1013 search results - page 84 / 203 » A hardware implementation of realloc function |
ICCAD
1994
IEEE
14 years 3 days ago
1994
IEEE
Given a set of specifications for a targeted application, algorithm selection refers to choosing the most suitable algorithm for a given goal, among several functionally equivalen...
FPL
2008
Springer
13 years 9 months ago
2008
Springer
This paper considers the implementation of an annealing technique for dynamic power reduction in FPGAs. The proposed method comprises a power-aware objective function for placemen...
CAI
2004
Springer
13 years 7 months ago
2004
Springer
A complete hardware implementation of an evolvable combinational unit for FPGAs is presented. The proposed combinational unit consisting of a virtual reconfigurable circuit and evo...
DELTA
2008
IEEE
14 years 2 months ago
2008
IEEE
Re-using embedded resources for implementing builtin self test mechanisms allows test cost reduction. In this paper we demonstrate how to implement costefficient built-in self tes...
ISQED
2003
IEEE
14 years 1 months ago
2003
IEEE
We discuss a non-intrusive methodology for concurrent fault detection in random combinational logic. The proposed method is similar to duplication, wherein a replica of the circui...