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MICRO
2002
IEEE
122views Hardware» more  MICRO 2002»
14 years 27 days ago
Microarchitectural denial of service: insuring microarchitectural fairness
Simultaneous multithreading seeks to improve the aggregate computation bandwidth of a processor core by sharing resources such as functional units, caches, TLB and so on. To date,...
Dirk Grunwald, Soraya Ghiasi
AHS
2007
IEEE
211views Hardware» more  AHS 2007»
14 years 11 hour ago
Synthesis of Multimode digital signal processing systems
In this paper, we propose a design methodology for implementing a multimode (or multi-configuration) and multi-throughput system into a single hardware architecture. The inputs of...
Caaliph Andriamisaina, Emmanuel Casseau, Philippe ...
FPL
2004
Springer
119views Hardware» more  FPL 2004»
13 years 11 months ago
Reconfigurable Instruction Set Extension for Enabling ECC on an 8-Bit Processor
Pervasive networks with low-cost embedded 8-bit processors are set to change our day-to-day life. Public-key cryptography provides crucial functionality to assure security which is...
Sandeep S. Kumar, Christof Paar
ISMVL
2008
IEEE
134views Hardware» more  ISMVL 2008»
14 years 2 months ago
Multiple-Valued Logic Memory System Design Using Nanoscale Electrochemical Cells
Nanoscale multiple-valued logic systems require the development of nanometer scale integrated circuits and components. Due to limits in device physics, new components must be deve...
Theodore W. Manikas, Dale Teeters
ISCAS
2007
IEEE
76views Hardware» more  ISCAS 2007»
14 years 2 months ago
In Vitro Epileptic Seizure Prediction Microsystem
— The architecture and VLSI implementation of an epileptic seizure prediction microsystem are presented. The microsystem comprises a neural recording interface and a seizure pred...
J. N. Y. Aziz, Rafal Karakiewicz, Roman Genov, A. ...