70 search results - page 12 / 14 » A hardware software partitioning algorithm for pipelined ins... |
139
Voted
PPOPP
2010
ACM
15 years 10 months ago
2010
ACM
In processors with several levels of hardware resource sharing, like CMPs in which each core is an SMT, the scheduling process becomes more complex than in processors with a singl...
150
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EUROPAR
1997
Springer
15 years 8 months ago
1997
Springer
Instruction scheduling in general, and software pipelining in particular face the di cult task of scheduling operations in the presence of uncertain latencies. The largest contrib...
134
Voted
DATE
2006
IEEE
15 years 10 months ago
2006
IEEE
Sensor networks are emerging wireless technologies; their integration with the existing 2.5G, 3G mobile networks is a key issue to provide advanced services, e.g., health control....
135
Voted
CGO
2006
IEEE
15 years 10 months ago
2006
IEEE
Most programs are repetitive, where similar behavior can be seen at different execution times. Algorithms have been proposed that automatically group similar portions of a program...
148
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CASES
2007
ACM
15 years 8 months ago
2007
ACM
The last decade has witnessed the emergence of the Application Specific Instruction-set Processor (ASIP) as a viable platform for embedded systems. Extensible ASIPs allow the user...