70 search results - page 5 / 14 » A hardware software partitioning algorithm for pipelined ins... |
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IEEEPACT
2007
IEEE
15 years 10 months ago
2007
IEEE
In recent years, microprocessor manufacturers have shifted their focus from single-core to multi-core processors. To avoid burdening programmers with the responsibility of paralle...
158
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ESTIMEDIA
2005
Springer
15 years 9 months ago
2005
Springer
Designing Application-Specific Instruction-set Processors (ASIPs) usually requires designing a custom datapath, and modifying instruction-set, instruction decoder, and compiler. A...
165
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DATE
2002
IEEE
15 years 8 months ago
2002
IEEE
Software self-testing for embedded processor cores based on their instruction set, is a topic of increasing interest since it provides an excellent test resource partitioning tech...
141
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PAIRING
2007
Springer
15 years 10 months ago
2007
Springer
A series of recent algorithmic advances has delivered highly effective methods for pairing evaluation and parameter generation. However, the resulting multitude of options means m...
126
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CODES
2005
IEEE
15 years 9 months ago
2005
IEEE
Code density is an important issue in memory constrained systems. Some RISC processor, e.g. the THUMB extension in the ARM processor, supports aggressive code size reduction even ...