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» A high performance JPEG2000 architecture
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HPCA
1998
IEEE
14 years 1 months ago
FPGA Based Custom Computing Machines for Irregular Problems
Over the past few years there has been increased interest in building custom computing machines (CCMs) as a way of achieving very high performance on specific problems. The advent...
David Abramson, Paul Logothetis, Adam Postula, Mar...
DDECS
2009
IEEE
171views Hardware» more  DDECS 2009»
14 years 4 months ago
Packet header analysis and field extraction for multigigabit networks
—Packet header analysis and extraction of header fields needs to be performed in all network devices. As network speed is increasing quickly, high speed packet header processing...
Petr Kobierský, Jan Korenek, Libor Polcak
CASES
2009
ACM
14 years 4 months ago
CGRA express: accelerating execution using dynamic operation fusion
Coarse-grained reconfigurable architectures (CGRAs) present an appealing hardware platform by providing programmability with the potential for high computation throughput, scalab...
Yongjun Park, Hyunchul Park, Scott A. Mahlke
IPPS
2006
IEEE
14 years 3 months ago
Multi-clock pipelined design of an IEEE 802.11a physical layer transmitter
Among different wireless LAN technologies 802.11a has recently become popular due to its high throughput, large system capacity, and relatively long range. In this paper, we prop...
Maryam Mizani, Daler N. Rakhmatov
ISCC
2006
IEEE
129views Communications» more  ISCC 2006»
14 years 3 months ago
A Semantic Overlay Network for P2P Schema-Based Data Integration
Abstract— Today data sources are pervasive and their number is growing tremendously. Current tools are not prepared to exploit this unprecedented amount of information and to cop...
Carmela Comito, Simon Patarin, Domenico Talia