2209 search results - page 287 / 442 » A high performance JPEG2000 architecture |
PDP
2010
IEEE
14 years 1 months ago
2010
IEEE
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...
CDES
2006
13 years 10 months ago
2006
In this paper, a double precision IEEE 754 floating-point multiplier with high speed and low power is presented. The bottleneck of any double precision floatingpoint multiplier des...
CGO
2005
IEEE
14 years 2 months ago
2005
IEEE
The growing complexity of modern processors has made the generation of highly efficient code increasingly difficult. Manual code generation is very time consuming, but it is oft...
TC
2010
13 years 4 months ago
2010
In this paper, we define and study a new class of capacity planning models called MAP queueing networks. MAP queueing networks provide the first analytical methodology to describe ...
EUROCRYPT
2009
Springer
14 years 9 months ago
2009
Springer
Abstract. This paper reports record-setting performance for the ellipticcurve method of integer factorization: for example, 926.11 curves/second for ECM stage 1 with B1 = 8192 for ...