46 search results - page 6 / 10 » A high performance bus communication architecture through bu... |
CODES
2003
IEEE
14 years 1 months ago
2003
IEEE
Ever increasing complexity and heterogeneity of SoC platforms require diversified on-chip communication schemes beyond the currently omnipresent shared bus architectures. To prev...
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
Efficient communication modeling is a critical task in SoC design and exploration. In particular, fast and accurate communication is needed to predict the performance of a system....
ICC
2007
IEEE
14 years 2 months ago
2007
IEEE
— We focus on Metropolitan Area Networks operating in packet mode and exploiting a single-hop wavelength division multiplexing (WDM) architecture. First, we briefly describe a s...
DAC
2000
ACM
14 years 9 months ago
2000
ACM
The Esprit/OMI-COSY project defines transaction-levels to set-up the exchange of IP's in separating function from architecture and body-behavior from proprietary interfaces. ...
VLSISP
1998
13 years 7 months ago
1998
This paper describes the architecture and the performance of a new programmable 16-bit Digital Signal Processor (DSP) engine. It is developed specifically for next generation wire...