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ISCAS
2005
IEEE
129views Hardware» more  ISCAS 2005»
14 years 1 months ago
A reconfigurable architecture for scanning biosequence databases
—Unknown protein sequences are often compared to a set of known sequences (a database scan) to detect functional similarities. Even though efficient dynamic programming algorithm...
Timothy F. Oliver, Bertil Schmidt, Douglas L. Mask...
CISC
2009
Springer
186views Cryptology» more  CISC 2009»
13 years 5 months ago
Hardware Framework for the Rabbit Stream Cipher
Rabbit is a software-oriented synchronous stream cipher with very strong security properties and support for 128-bit keys. Rabbit is part of the European Union's eSTREAM portf...
Deian Stefan
ASPDAC
2005
ACM
142views Hardware» more  ASPDAC 2005»
13 years 9 months ago
An AMBA AHB-based reconfigurable SOC architecture using multiplicity of dedicated flyby DMA blocks
– We propose a System-on-Chip (SoC) architecture for reconfigurable applications based on the AMBA HighSpeed Bus (AHB). The architecture features multiple low-area flyby DMA bloc...
Adeoye Olugbon, Sami Khawam, Tughrul Arslan, Ioann...
AHS
2007
IEEE
251views Hardware» more  AHS 2007»
13 years 11 months ago
System Level Modelling of Reconfigurable FFT Architecture for System-on-Chip Design
In the system-on-chip (SoC) era, the growing number of functionalities included on a single chip requires the development of new design methodologies to keep the design complexity...
Ali Ahmadinia, Balal Ahmad, Tughrul Arslan
ASPDAC
2007
ACM
156views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Implementation of a Real Time Programmable Encoder for Low Density Parity Check Code on a Reconfigurable Instruction Cell Archit
- This paper presents a real time programmable irregular Low Density Parity Check (LDPC) Encoder as specified in the IEEE P802.16E/D7 standard. The encoder is programmable for fram...
Zahid Khan, Tughrul Arslan