159 search results - page 19 / 32 » A high throughput 3D-bus interconnect for network processors |
ISCA
2008
IEEE
13 years 8 months ago
2008
IEEE
Evolving technology and increasing pin-bandwidth motivate the use of high-radix routers to reduce the diameter, latency, and cost of interconnection networks. High-radix networks,...
PDP
2009
IEEE
14 years 3 months ago
2009
IEEE
Abstract—Execution of applications on upcoming highperformance computing (HPC) systems introduces a variety of new challenges and amplifies many existing ones. These systems will...
CLUSTER
2002
IEEE
14 years 1 months ago
2002
IEEE
Clusters of workstations have emerged as an important platform for building cost-effective, scalable, and highlyavailable computers. Although many hardware solutions are available...
COLT
1992
Springer
14 years 15 days ago
1992
Springer
This paper deals with finite size networks which consist of interconnections of synchronously evolving processors. Each processor updates its state by applying a "sigmoidal&q...
WMPI
2004
ACM
14 years 1 months ago
2004
ACM
The ever increasing gap in processor and memory speeds has a very negative impact on performance. One possible solution to overcome this problem is the Kilo-instruction processor. ...