159 search results - page 23 / 32 » A high throughput 3D-bus interconnect for network processors |
FPGA
2010
ACM
13 years 7 months ago
2010
ACM
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
ARC
2009
Springer
14 years 2 months ago
2009
Springer
As the need for information security increases in our everyday life, the job of encoding/decoding for secure information delivery becomes a critical issue in data network systems. ...
ICC
2007
IEEE
14 years 1 months ago
2007
IEEE
— In this paper, we investigate joint resource allocation and routing for a wireless mesh network consisting of fixed access points inter-connected through multi-channel wireles...
DATE
2003
IEEE
14 years 19 days ago
2003
IEEE
Managing the complexity of designing chips containing billions of transistors requires decoupling computation from communication. For the communication, scalable and compositional...
MSWIM
2004
ACM
14 years 23 days ago
2004
ACM
Recent trends in sensor network simulation can be divided between less flexible but accurate emulation based approach and more generic but less detailed network simulator models....