Sciweavers

159 search results - page 8 / 32
» A high throughput 3D-bus interconnect for network processors
Sort
View
HPCC
2007
Springer
14 years 1 months ago
Performance Evaluation of Distributed Computing over Heterogeneous Networks
RWAPI is a low-level communication interface designed for clusters of PCs. It has been developed to provide performance to higher applications on a wide variety of architectures. W...
Ouissem Ben Fredj, Éric Renault
NCA
2005
IEEE
14 years 28 days ago
C-CORE: Using Communication Cores for High Performance Network Services
Recent hardware advances are creating multi-core systems with heterogeneous functionality. This paper explores how applications and middleware can utilize systems comprised of pro...
Sanjay Kumar, Ada Gavrilovska, Karsten Schwan, Sri...
HPCA
2009
IEEE
14 years 7 months ago
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
Reetuparna Das, Soumya Eachempati, Asit K. Mishra,...
HOTI
2008
IEEE
14 years 1 months ago
Adaptive Routing Strategies for Modern High Performance Networks
Today’s scalable high-performance applications heavily depend on the bandwidth characteristics of their communication patterns. Contemporary multi-stage interconnection networks...
Patrick Geoffray, Torsten Hoefler
ASPDAC
2007
ACM
121views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Approximation Algorithm for Process Mapping on Network Processor Architectures
The high performance requirements of networking applications has led to the advent of programmable network processor (NP) architectures that incorporate symmetric multiprocessing, ...
Christopher Ostler, Karam S. Chatha, Goran Konjevo...