We use Schnyder woods of 3-connected planar graphs to produce convex straight line drawings on a grid of size (n − 2 − ∆) × (n − 2 − ∆). The parameter ∆ ≥ 0 depen...
Parasitic extraction techniques are used to estimate signal delay in VLSI chips. Inductance extraction is a critical component of the parasitic extraction process in which on-chip ...
We present a domain-theoretic version of Picard’s theorem for solving classical initial value problems in Rn . For the case of vector fields that satisfy a Lipschitz condition, ...
Compared with previous video coding standards, H.264/AVC employs a division-free quantization scheme. The relation between quantization parameter and quantization step changes from...
The growing impact of within-die process variation has created the need for statistical timing analysis, where gate delays are modeled as random variables. Statistical timing anal...
Aseem Agarwal, David Blaauw, Vladimir Zolotov, Sar...