We describe an architectural design space exploration methodology that minimizes the energy dissipation of digital circuits. The centerpiece of our methodology is a Verilog-based ...
Orthogonal scan paths, which follow the path of the data flow, can be used in data path designs to reduce the test overhead -- area, delay and test application time -- by sharing ...
Abstract - We address the problem of automatically verifying large digital designs at the logic level, against high-level specifications. In this paper, we present a methodology wh...
We focus in this paper on some meta-level ontological distinctions among unary predicates, like those between concepts and assertional properties. Three are the main contributions...
In this paper we propose an ontology based representation of the affective states for context aware applications that allows expressing the complex relations that are among the af...