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DAC
1997
ACM
13 years 11 months ago
Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT
We describe an architectural design space exploration methodology that minimizes the energy dissipation of digital circuits. The centerpiece of our methodology is a Verilog-based ...
Thucydides Xanthopoulos, Yoshifumi Yaoi, Anantha C...
ITC
1996
IEEE
107views Hardware» more  ITC 1996»
13 years 11 months ago
Orthogonal Scan: Low-Overhead Scan for Data Paths
Orthogonal scan paths, which follow the path of the data flow, can be used in data path designs to reduce the test overhead -- area, delay and test application time -- by sharing ...
Robert B. Norwood, Edward J. McCluskey
DAC
1994
ACM
13 years 11 months ago
Automatic Verification of Pipelined Microprocessors
Abstract - We address the problem of automatically verifying large digital designs at the logic level, against high-level specifications. In this paper, we present a methodology wh...
Vishal Bhagwati, Srinivas Devadas
KR
1994
Springer
13 years 11 months ago
An Ontology of Meta-Level Categories
We focus in this paper on some meta-level ontological distinctions among unary predicates, like those between concepts and assertional properties. Three are the main contributions...
Nicola Guarino, Massimiliano Carrara, Pierdaniele ...
EATIS
2007
ACM
13 years 11 months ago
Ontology Based Affective Context Representation
In this paper we propose an ontology based representation of the affective states for context aware applications that allows expressing the complex relations that are among the af...
Kuderna-Iulian Benta, Anca Rarau, Marcel Cremene