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» A low complexity hardware architecture for motion estimation
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ICMCS
2008
IEEE
168views Multimedia» more  ICMCS 2008»
14 years 2 months ago
A co-design platform for algorithm/architecture design exploration
The efficient implementation of multimedia algorithms, for the ever increasing complexity of the specifications and the emergence of the new generation of processing platforms c...
Christophe Lucarz, Marco Mattavelli, Julien Dubois
ISCAS
2006
IEEE
163views Hardware» more  ISCAS 2006»
14 years 1 months ago
ASIC hardware implementation of the IDEA NXT encryption algorithm
— Symmetric-key block ciphers are often used to provide data confidentiality with low complexity, especially in the case of dedicated hardware implementations. IDEA NXT is a nov...
Marco Macchetti, Wenyu Chen
ICMCS
2006
IEEE
152views Multimedia» more  ICMCS 2006»
14 years 1 months ago
Reuse of Motion Processing for Camera Stabilization and Video Coding
The low bit rate of existing video encoders relies heavily on the accuracy of estimating actual motion in the input video sequence. In this paper, we propose a Video Stabilization...
Bao Lei, Rene Klein Gunnewiek, Peter H. N. de With
VLSID
2005
IEEE
157views VLSI» more  VLSID 2005»
14 years 8 months ago
Energy Efficient Hardware Synthesis of Polynomial Expressions
Polynomial expressions are used to approximate a wide variety of functions commonly found in signal processing and computer graphics applications. Computing these polynomial expre...
Anup Hosangadi, Farzan Fallah, Ryan Kastner
ISCAS
2002
IEEE
163views Hardware» more  ISCAS 2002»
14 years 17 days ago
A two-pass optimal motion-threading technique for 3D wavelet video coding
Motion-threading is a novel technique that can efficiently incorporate motion information into the 3D wavelet video coding. By utilizing shape adaptive wavelet transform along wit...
Lin Luo, Feng Wu, Shipeng Li, Zhenquan Zhuang, Ya-...