315 search results - page 28 / 63 » A low complexity hardware architecture for motion estimation |
MICRO
2010
IEEE
13 years 5 months ago
2010
IEEE
Wide Single Instruction, Multiple Thread (SIMT) architectures often require a static allocation of thread groups that are executed in lockstep throughout the entire application ker...
ICCD
2006
IEEE
14 years 4 months ago
2006
IEEE
— Driven by the need for higher bandwidth and complexity reduction, off-chip interconnect has evolved from proprietary busses to networked architectures. A similar evolution is o...
DAC
1995
ACM
13 years 11 months ago
1995
ACM
- Power estimation in combinational modules is addressed from a probabilistic point of view. The zero-delay hypothesis is considered and under highly correlated input streams, the ...
ISLPED
1997
ACM
13 years 12 months ago
1997
ACM
We present detailed analytical models for estimating the energy dissipation in conventional caches as well as low energy cache architectures. The analytical models use the run tim...
DATE
1999
IEEE
13 years 12 months ago
1999
IEEE
Dynamically reconfigurable embedded systems offer potential for higher performance as well as adaptability to changing system requirements at low cost. Such systems employ run-tim...