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» A low complexity hardware architecture for motion estimation
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ASPDAC
2006
ACM
288views Hardware» more  ASPDAC 2006»
14 years 1 months ago
Algorithms and DSP implementation of H.264/AVC
Abstract - This survey paper intends to provide a comprehensive coverage of the techniques that are pertinent to the processor-based implementation of H.264/AVC video codec, partic...
Hung-Chih Lin, Yu-Jen Wang, Kai-Ting Cheng, Shang-...
PSIVT
2007
Springer
125views Multimedia» more  PSIVT 2007»
14 years 1 months ago
Studying the GOP Size Impact on the Performance of a Feedback Channel-Based Wyner-Ziv Video Codec
Wyner-Ziv video coding has become one of the hottest research topics in the video coding community due to the conceptual, theoretical and functional novelties it brings. Among the ...
Fernando Pereira, João Ascenso, Catarina Br...
ICCD
2008
IEEE
111views Hardware» more  ICCD 2008»
14 years 4 months ago
Power switch characterization for fine-grained dynamic voltage scaling
—Dynamic voltage scaling (DVS) provides power savings for systems with varying performance requirements. One low overhead implementation of DVS uses PMOS power switches to connec...
Liang Di, Mateja Putic, John Lach, Benton H. Calho...
ECBS
2004
IEEE
102views Hardware» more  ECBS 2004»
13 years 11 months ago
WASP: A Radio Geolocation System on Highly Resource Constrained Mobile Platforms
In recent years, there has been an increased need for surveillance capabilities in both civilian and military arenas. Mobile unmanned sensor fleets have long been envisioned as a ...
Kumar Chhokra, Ted Bapty, Jason Scott, Simon Winbe...
ICCAD
2002
IEEE
103views Hardware» more  ICCAD 2002»
14 years 4 months ago
Synthesis of customized loop caches for core-based embedded systems
Embedded system programs tend to spend much time in small loops. Introducing a very small loop cache into the instruction memory hierarchy has thus been shown to substantially red...
Susan Cotterell, Frank Vahid