444 search results - page 5 / 89 » A low power high performance switched-current multiplier |
JCP
2008
13 years 7 months ago
2008
In this paper a new low power and high performance adder cell using a new design style called "Bridge" is proposed. The bridge design style enjoys a high degree of regula...
IPPS
2005
IEEE
14 years 1 months ago
2005
IEEE
“MegaProto” is a proof-of-concept prototype for our project “Mega-Scale Computing Based on Low-Power Technology and Workload Modeling”, implementing our key idea that a mi...
DAC
2007
ACM
14 years 8 months ago
2007
ACM
We propose a design and optimization methodology for high performance and ultra low power digital applications on flexible substrate using Low Temperature Polycrystalline Silicon ...
DSD
2004
IEEE
13 years 11 months ago
2004
IEEE
In this paper, we present a full-static carry-skip adder designed to achieve low power dissipation and high-performance operation. To reduce the adder's delay and power consu...
VLSID
2002
IEEE
14 years 7 months ago
2002
IEEE
This paper presents a novel approach for the synthesis of dynamic CMOS circuits using Domino and Nora styles. As these logic styles can implement only non-inverting logic, convent...