444 search results - page 8 / 89 » A low power high performance switched-current multiplier |
ASPDAC
2008
ACM
13 years 9 months ago
2008
ACM
Meeting power and performance requirement is a challenging task in high speed ALUs. Supply voltage scaling is promising because it reduces both switching and active power but it al...
ISCAS
2003
IEEE
14 years 21 days ago
2003
IEEE
Conventional ASIC designs are hard to be customized. Therefore DSP core-based ASIC design has potentially large payoff. This approach not only supports improved performance but al...
ISLPED
2000
ACM
13 years 11 months ago
2000
ACM
In this paper, we describe area and power reduction techniques for a low-latency adaptive finite-impulse response filter for magnetic recording read channel applications. Variou...
ISVLSI
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper presents the low power implementation of a Maximum Likelihood (ML) based detector used in the receiver part of a Multiple Input and Multiple Output (MIMO) systems. Low ...
ICCAD
2003
IEEE
14 years 4 months ago
2003
IEEE
This work is a contribution to high level synthesis for low power systems. While device feature size decreases, interconnect power becomes a dominating factor. Thus it is importan...