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» A low-complexity issue logic
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ISCA
2003
IEEE
108views Hardware» more  ISCA 2003»
14 years 3 months ago
Effective ahead Pipelining of Instruction Block Address Generation
On a N-way issue superscalar processor, the front end instruction fetch engine must deliver instructions to the execution core at a sustained rate higher than N instructions per c...
André Seznec, Antony Fraboulet
ISCAS
2003
IEEE
167views Hardware» more  ISCAS 2003»
14 years 3 months ago
The multi-level paradigm for distributed fault detection in networks with unreliable processors
In this paper, we study the effectiveness of the multilevel paradigm in considerably reducing the diagnosis latency of distributed algorithms for fault detection in networks with ...
Krishnaiyan Thulasiraman, Ming-Shan Su, V. Goel
ISCA
2010
IEEE
185views Hardware» more  ISCA 2010»
14 years 2 months ago
Dynamic warp subdivision for integrated branch and memory divergence tolerance
SIMD organizations amortize the area and power of fetch, decode, and issue logic across multiple processing units in order to maximize throughput for a given area and power budget...
Jiayuan Meng, David Tarjan, Kevin Skadron
PLDI
2010
ACM
14 years 2 months ago
Decoupled lifeguards: enabling path optimizations for dynamic correctness checking tools
Dynamic correctness checking tools (a.k.a. lifeguards) can detect a wide array of correctness issues, such as memory, security, and concurrency misbehavior, in unmodified executa...
Olatunji Ruwase, Shimin Chen, Phillip B. Gibbons, ...
COOPIS
2002
IEEE
14 years 2 months ago
Formal Ontology Engineering in the DOGMA Approach
This paper presents a specifically database-inspired approach (called DOGMA) for engineering formal ontologies, implemented as shared resources used to express agreed formal semant...
Mustafa Jarrar, Robert Meersman