This paper describes a new design methodology to analyze the on-chip power supply noise for high performance microprocessors. Based on an integrated package-level and chip-level p...
Our earlier work for fast evaluation of power consumption of general cores in a system-on-a-chip described techniques that involved isolating high-level instructions of a core, me...
Virtualization is often used in cloud computing platforms for its several advantages in efficiently managing resources. However, virtualization raises certain additional challeng...
Aman Kansal, Feng Zhao, Jie Liu, Nupur Kothari, Ar...
Abstract. In this paper we present a new approach to power modeling and runtime power estimation for wireless network interface cards (WNICs). We obtain run-time power estimates by...
Emanuele Lattanzi, Andrea Acquaviva, Alessandro Bo...
Realization of high-performance domino logic depends strongly on energy-efficient and noise-tolerant interconnect design in ultra deep sub-micron processes. We characterize the c...
Ki-Wook Kim, Seong-Ook Jung, Unni Narayanan, C. L....