77 search results - page 8 / 16 » A new cache architecture based on temporal and spatial local... |
MICRO
2000
IEEE
13 years 12 months ago
2000
IEEE
Silent store instructions write values that exactly match the values that are already stored at the memory address that is being written. A recent study reveals that significant ...
ICS
1999
Tsinghua U.
13 years 12 months ago
1999
Tsinghua U.
—This paper explores the use of compiler optimizations which optimize the layout of instructions in memory. The target is to enable the code to make better use of the underlying ...
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
— Modern CPUs operate at GHz frequencies, but the latencies of memory accesses are still relatively large, in the order of hundreds of cycles. Deeper cache hierarchies with large...
ISBI
2007
IEEE
14 years 1 months ago
2007
IEEE
In this paper we present a dynamic texture based motion segmentation approach to address the challenging problem of heart localization and segmentation in 4D Spatio-temporal cardi...
CVPR
2010
IEEE
13 years 7 months ago
2010
IEEE
A novel framework for anomaly detection in crowded scenes is presented. Three properties are identified as important for the design of a localized video representation suitable f...