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» A new class of linear feedback shift register generators
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ATS
1998
IEEE
170views Hardware» more  ATS 1998»
13 years 11 months ago
A Ring Architecture Strategy for BIST Test Pattern Generation
This paper presents a new effective Built-In Self Test (BIST) scheme that achieves 100% fault coverage with low area overhead, and without any modification of the circuit under tes...
Christophe Fagot, Olivier Gascuel, Patrick Girard,...
ICCD
2002
IEEE
108views Hardware» more  ICCD 2002»
14 years 4 months ago
Low Power Mixed-Mode BIST Based on Mask Pattern Generation Using Dual LFSR Re-Seeding
Low power design techniques have been employed for more than two decades, however an emerging problem is satisfying the test power constraints for avoiding destructive test and im...
Paul M. Rosinger, Bashir M. Al-Hashimi, Nicola Nic...
CRYPTO
2000
Springer
124views Cryptology» more  CRYPTO 2000»
13 years 11 months ago
Fast Correlation Attacks through Reconstruction of Linear Polynomials
The task of a fast correlation attack is to efficiently restore the initial content of a linear feedback shift register in a stream cipher using a detected correlation with the out...
Thomas Johansson, Fredrik Jönsson
VTS
1995
IEEE
94views Hardware» more  VTS 1995»
13 years 11 months ago
Synthesis of locally exhaustive test pattern generators
Optimized locally exhaustive test pattern generators based on linear sums promise a low overhead, but have an irregular structure. The paper presents a new algorithm able to compu...
Günter Kemnitz
DAC
2003
ACM
14 years 21 days ago
Efficient compression and application of deterministic patterns in a logic BIST architecture
We present a novel method to efficiently generate, compress and apply test patterns in a logic BIST architecture. Patterns are generated by a modified automatic test pattern gener...
Peter Wohl, John A. Waicukauski, Sanjay Patel, Min...