Recently a deterministic built-in self-test scheme has been presented based on reseeding of multiple-polynomial linear feedback shift registers. This scheme encodes deterministic ...
Abstract. This paper investigates the design of S-boxes used for combining linear feedback shift register (LFSR) sequences in combination generators. Such combination generators ha...
Cache timing attacks are a class of side-channel attacks that is applicable against certain software implementations. They have generated significant interest when demonstrated ag...
A test pattern generator (TPG) for built-in self-test (BIST), which can reduce switching activity during test application, is proposed. The proposed TPG, called dual-speed LFSR (DS...
In this work, we present the application of Generalized Linear Feedback Shift Registers (GLFSRs) for generation of patterns for pseudo-random memory Built-In SelfTest (BIST). Rece...
Michael Redeker, Markus Rudack, Thomas Lobbe, Dirk...