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ISCA
2005
IEEE
99views Hardware» more  ISCA 2005»
14 years 1 months ago
Improving Multiprocessor Performance with Coarse-Grain Coherence Tracking
To maintain coherence in conventional shared-memory multiprocessor systems, processors first check other processors’ caches before obtaining data from memory. This coherence che...
Jason F. Cantin, Mikko H. Lipasti, James E. Smith
CCS
2010
ACM
13 years 8 months ago
DIFC programs by automatic instrumentation
Decentralized information flow control (DIFC) operating systems provide applications with mechanisms for enforcing information-flow policies for their data. However, significant o...
William R. Harris, Somesh Jha, Thomas W. Reps
JUCS
2006
112views more  JUCS 2006»
13 years 7 months ago
A Multi-objective Genetic Approach to Mapping Problem on Network-on-Chip
Abstract: Advances in technology now make it possible to integrate hundreds of cores (e.g. general or special purpose processors, embedded memories, application specific components...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi
IPPS
2003
IEEE
14 years 1 months ago
A Low Cost Fault Tolerant Packet Routing for Parallel Computers
This work presents a new switching mechanism to tolerate arbitrary faults in interconnection networks with a negligible implementation cost. Although our routing technique can be ...
Valentin Puente, José A. Gregorio, Ram&oacu...
AIPS
1998
13 years 9 months ago
Flexible and Scalable Query Planning in Distributed and Heterogeneous Environments
We present the application of the Planning by Rewriting PbR framework to query planning in distributed and heterogeneous environments. PbR is a new paradigm for e cient high-quali...
José Luis Ambite, Craig A. Knoblock