155 search results - page 19 / 31 » A new heuristic algorithm for reversible logic synthesis |
ICCAD
1994
IEEE
13 years 11 months ago
1994
IEEE
-- We describe a new high-level compiler called Integral fordesigning system interface modules. The inputis a high-levelconcurrent algorithmic specification that can model complex ...
ICAIL
2003
ACM
14 years 22 days ago
2003
ACM
Defeasible Logic is a promising representation for legal knowledge that appears to overcome many of the deficiencies of previous approaches to representing legal knowledge. Unfor...
ISPD
2003
ACM
14 years 22 days ago
2003
ACM
For multi-gigahertz designs in nanometer technologies, data transfers on global interconnects take multiple clock cycles. In this paper, we propose a regular distributed register ...
CIIA
2009
13 years 8 months ago
2009
In this paper, we present a new synthesis feature namely, "Xor matching", and the foldback product term synthesis for Complex Programmable Logic Devices (CPLD) architectu...
ICCAD
2004
IEEE
14 years 4 months ago
2004
IEEE
— This paper presents Hermes, a depth-optimal LUT based FPGA mapping algorithm. The presented algorithm is based on a new strategy for finding LUTs allowing to find a good LUT ...