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TOPLAS
2002
89views more  TOPLAS 2002»
13 years 7 months ago
Efficient and precise array access analysis
A number of existing compiler techniques hinge on the analysis of array accesses in the program. The most important task in array access analysis is to collect the information abo...
Yunheung Paek, Jay Hoeflinger, David A. Padua
ICPP
1995
IEEE
13 years 11 months ago
Multilevel Graph Partitioning Schemes
– In this paper we present experiments with a class of graph partitioning algorithms that reduce the size of the graph by collapsing vertices and edges, partition the smaller gra...
George Karypis, Vipin Kumar
ICCD
2008
IEEE
124views Hardware» more  ICCD 2008»
14 years 4 months ago
Global bus route optimization with application to microarchitectural design exploration
— Circuit and processor designs will continue to increase in complexity for the foreseeable future. With these increasing sizes comes the use of wide buses to move large amounts ...
Dae Hyun Kim, Sung Kyu Lim
CCE
2005
13 years 7 months ago
Logic-based outer approximation for globally optimal synthesis of process networks
Process network problems can be formulated as Generalized Disjunctive Programs where a logicbased representation is used to deal with the discrete and continuous decisions. A new ...
María Lorena Bergamini, Pío A. Aguir...
VLSI
2010
Springer
13 years 5 months ago
Fine-grained post placement voltage assignment considering level shifter overhead
—Multi-Vdd techniques enable application of lower supply voltage levels on cells with timing slacks. New voltage assignment, placement and voltage island partitioning methods are...
Zohreh Karimi, Majid Sarrafzadeh