179 search results - page 30 / 36 » A new test pattern generation method for delay fault testing |
INFSOF
2011
13 years 2 months ago
2011
Context: Service Oriented Architectures (SOA) have emerged as a new paradigm to develop interoperable and highly dynamic applications. Objective: This paper aims to identify the s...
EURODAC
1994
IEEE
13 years 11 months ago
1994
IEEE
This paper presents a testability improvement method for digital systems described in VHDL behavioral specification. The method is based on testability analysis at registertransfe...
TCAD
1998
13 years 7 months ago
1998
—New methods for fault-effect propagation and state justification that use finite-state-machine sequences are proposed for sequential circuit test generation. Distinguishing se...
WEA
2005
Springer
14 years 1 months ago
2005
Springer
Abstract. A5/1 pseudo-random bit generator, known from GSM networks, potentially might be used for different purposes, such as secret hiding during cryptographic hardware testing, ...
DT
2000
13 years 7 months ago
2000
Effective high-level ATPG tools are increasingly needed, as an essential element in the quest for reducing as much as possible the designer work on gate-level descriptions. We pro...