179 search results - page 32 / 36 » A new test pattern generation method for delay fault testing |
DAC
2002
ACM
14 years 8 months ago
2002
ACM
The next generation of computer chips will continue the trend for more complexity than their predecessors. Many of them will contain different chip technologies and are termed SoC...
KBSE
2009
IEEE
14 years 2 months ago
2009
IEEE
—We investigate claims and assumptions made in several recent papers about fault localization (FL) techniques. Most of these claims have to do with evaluating FL accuracy. Our in...
ITC
1997
IEEE
13 years 11 months ago
1997
IEEE
Tri-state buses and pass transistor logic are used in many complex applications to achieve high performance and small area. Such circuits often contain logic requiring one-hot sig...
ATAL
2008
Springer
13 years 9 months ago
2008
Springer
The ability to provide flexible, automated management of air traffic is critical to meeting the ever increasing needs of the next generation air transportation systems. This probl...
CIARP
2009
Springer
14 years 5 days ago
2009
Springer
Abstract. In this work we propose a new method to create neural network ensembles. Our methodology develops over the conventional technique of bagging, where multiple classifiers ...