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DATE
2008
IEEE
99views Hardware» more  DATE 2008»
14 years 2 months ago
GMDS: Hardware implementation of novel real output queuing architecture
In this paper, a real output queuing switch prototype implementation is presented. This implementation is based on a novel high speed multidrop backplane and a general purpose lin...
R. Arteaga, Félix Tobajas, Roberto Esper-Ch...
ISCAS
2008
IEEE
191views Hardware» more  ISCAS 2008»
14 years 2 months ago
A novel approach for K-best MIMO detection and its VLSI implementation
— Since the complexity of MIMO detection algorithms is exponential, the K–best algorithm is often chosen for efficient VLSI implementation. This detection problem is often view...
Sudip Mondal, Khaled N. Salama, Wersame H. Ali
CSREASAM
2009
13 years 8 months ago
Tantra: A Fast PRNG Algorithm and its Implementation
Tantra 1 is a novel Pseudorandom number generator (PRNG) design that provides a long sequence high quality pseudorandom numbers at very high rate both in software and hardware impl...
Mahadevan Gomathisankaran, Ruby Lee
ISCAS
2007
IEEE
106views Hardware» more  ISCAS 2007»
14 years 1 months ago
Regularized Frequency Domain Equalization Algorithm and its VLSI Implementation
Abstract— Approximation of Toeplitz matrices with circulant matrices is a well-known approach to reduce the computational complexity of linear equalizers. This paper presents a n...
Andreas Burg, Simon Haene, Wolfgang Fichtner, Mark...
IPPS
2003
IEEE
14 years 27 days ago
BLAM : A High-Performance Routing Algorithm for Virtual Cut-Through Networks
High performance, freedom from deadlocks, and freedom from livelocks are desirable properties of interconnection networks. Unfortunately, these can be conflicting goals because n...
Mithuna Thottethodi, Alvin R. Lebeck, Shubhendu S....