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» A novel improvement technique for high-level test synthesis
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IOLTS
2002
IEEE
148views Hardware» more  IOLTS 2002»
14 years 17 days ago
Active Replication: Towards a Truly SRAM-Based FPGA On-Line Concurrent Testing
The reusing of the same hardware resources to implement speed-critical algorithms, without interrupting system operation, is one of the main reasons for the increasing use of reco...
Manuel G. Gericota, Gustavo R. Alves, Miguel L. Si...
IGARSS
2010
13 years 5 months ago
SMOS L1 algorithms
The Level 1 Processing of SMOS transforms the data acquired by MIRAS (Microwave Imaging Radiometer with Aperture Synthesis) into geolocated TOA Brightness Temperatures, providing ...
Antonio Gutierrez, Jose Barbosa, Nuno Catarino, Ri...
IFL
2007
Springer
162views Formal Methods» more  IFL 2007»
14 years 1 months ago
Testing Erlang Refactorings with QuickCheck
Abstract. Refactoring is a technique for improving the design of existing programs without changing their behaviour. Wrangler is a tool built at the University of Kent to support E...
Huiqing Li, Simon Thompson
DAC
2003
ACM
14 years 27 days ago
Test generation for designs with multiple clocks
To improve the system performance, designs with multiple clocks have become more and more popular. In this paper, several novel test generation procedures are proposed to utilize ...
Xijiang Lin, Rob Thompson
ASWC
2009
Springer
14 years 2 months ago
Overcoming Schema Heterogeneity between Linked Semantic Repositories to Improve Coreference Resolution
Schema heterogeneity issues often represent an obstacle for discovering coreference links between individuals in semantic data repositories. In this paper we present an approach, w...
Andriy Nikolov, Victoria S. Uren, Enrico Motta, An...