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» A power-configurable bus for embedded systems
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DATE
1999
IEEE
162views Hardware» more  DATE 1999»
13 years 11 months ago
MOCSYN: Multiobjective Core-Based Single-Chip System Synthesis
In this paper, we present a system synthesis algorithm, called MOCSYN, which partitions and schedules embedded system specifications to intellectual property cores in an integrate...
Robert P. Dick, Niraj K. Jha
MAM
2002
110views more  MAM 2002»
13 years 7 months ago
Architecture of a fieldbus message scheduler coprocessor based on the planning paradigm
The use of a centralised planning scheduler in fieldbus-based systems requiring real-time operation has proved to be a good compromise between operational flexibility and timeline...
Ernesto Martins, Paulo A. C. S. Neves, José...
SIGMOD
1998
ACM
142views Database» more  SIGMOD 1998»
13 years 7 months ago
A Case for Intelligent Disks (IDISKs)
Abstract: Decision support systems (DSS) and data warehousing workloads comprise an increasing fraction of the database market today. I/O capacity and associated processing require...
Kimberly Keeton, David A. Patterson, Joseph M. Hel...
HPDC
1999
IEEE
13 years 11 months ago
Using Embedded Network Processors to Implement Global Memory Management in a Workstation Cluster
Advances in network technology continue to improve the communication performance of workstation and PC clusters, making high-performance workstation-clustercomputing increasingly ...
Yvonne Coady, Joon Suan Ong, Michael J. Feeley
ARVLSI
1997
IEEE
105views VLSI» more  ARVLSI 1997»
13 years 11 months ago
An Embedded DRAM for CMOS ASICs
The growing gap between on-chip gates and off-chip I/O bandwidth argues for ever larger amounts of on-chip memory. Emerging portable consumer technology, such as digital cameras, ...
John Poulton