2505 search results - page 101 / 501 » A predictive model of menu performance |
157
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SC
1995
ACM
15 years 8 months ago
1995
ACM
In this paper we present an analytical-based framework for parallel program performance prediction. The main thrust of this work is to provide a means for treating realistic appli...
140
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HPCA
2005
IEEE
16 years 5 months ago
2005
IEEE
This paper studies the impact of L2 cache sharing on threads that simultaneously share the cache, on a Chip Multi-Processor (CMP) architecture. Cache sharing impacts threads non-u...
140
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CHI
2009
ACM
16 years 5 months ago
2009
ACM
We discuss the problem of assessing and aiding user performance in dynamic tasks that require rapid selection among multiple information sources. Motivated by research in human se...
146
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ICS
2011
Tsinghua U.
14 years 8 months ago
2011
Tsinghua U.
Efficient on-chip resource management is crucial for Chip Multiprocessors (CMP) to achieve high resource utilization and enforce system-level performance objectives. Existing mul...
143
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ICIP
2003
IEEE
16 years 6 months ago
2003
IEEE
Although, computational Grid has been initially developed to solve large-scale scientific research problems, it is extended for commercial and industrial applications. An interest...