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MICRO
2009
IEEE
133views Hardware» more  MICRO 2009»
14 years 2 months ago
A tagless coherence directory
A key challenge in architecting a CMP with many cores is maintaining cache coherence in an efficient manner. Directory-based protocols avoid the bandwidth overhead of snoop-based ...
Jason Zebchuk, Vijayalakshmi Srinivasan, Moinuddin...
CODES
2008
IEEE
14 years 2 months ago
Static analysis for fast and accurate design space exploration of caches
Application-specific system-on-chip platforms create the opportunity to customize the cache configuration for optimal performance with minimal chip estate. Simulation, in partic...
Yun Liang, Tulika Mitra
ICA3PP
2010
Springer
14 years 9 days ago
InterCloud: Utility-Oriented Federation of Cloud Computing Environments for Scaling of Application Services
Abstract. Cloud computing providers have setup several data centers at different geographical locations over the Internet in order to optimally serve needs of their customers aroun...
Rajkumar Buyya, Rajiv Ranjan, Rodrigo N. Calheiros
IPPS
1999
IEEE
13 years 11 months ago
Non-Preemptive Scheduling of Real-Time Threads on Multi-Level-Context Architectures
The rapid progress in high-performance microprocessor design has made it di cult to adapt real-time scheduling results to new models of microprocessor hardware, thus leaving an un...
Jan Jonsson, Henrik Lönn, Kang G. Shin
INFOCOM
1998
IEEE
13 years 11 months ago
Limited Wavelength Translation in All-Optical WDM Mesh Networks
We analyze limited wavelength translation in all-optical, wavelength division multiplexed (WDM) wraparound mesh networks, where upto W wavelengths, each of which can carry one circ...
Vishal Sharma, Emmanouel A. Varvarigos