Sciweavers

1017 search results - page 124 / 204
» A routing algorithm for flip-chip design
Sort
View
INFOCOM
2007
IEEE
14 years 3 months ago
Transmit Power Distribution of Wireless Ad Hoc Networks with Topology Control
— Topology control and routing protocols are used by designers of wireless packet data networks to lower the node degree, simplify routing and lower the nodes’ energy consumpti...
Dan Avidor, Sayandev Mukherjee, Furuzan Atay Onat
FPGA
2005
ACM
80views FPGA» more  FPGA 2005»
14 years 2 months ago
Simultaneous timing-driven placement and duplication
Logic duplication is an effective method for improving circuit performance. In this paper we present an algorithm named SPD that performs simultaneous placement and duplication to...
Gang Chen, Jason Cong
ICPP
2003
IEEE
14 years 2 months ago
Hardware-Assisted Design for Fast Packet Forwarding in Parallel Routers
A hardware-assisted design, dubbed cache-oriented multistage structure (COMS), is proposed for fast packet forwarding. COMS incorporates small on-chip cache memory in its constitu...
Nian-Feng Tzeng
PEWASUN
2006
ACM
14 years 2 months ago
Experimental analysis of a transport protocol for ad hoc networks (TPA)
Many previous papers have pointed out that TCP performance in multi-hop ad hoc networks is not optimal. This is due to several TCP design principles that reflect the characteristi...
Giuseppe Anastasi, Emilio Ancillotti, Marco Conti,...
DAC
2006
ACM
14 years 10 months ago
Optimal simultaneous mapping and clustering for FPGA delay optimization
Both technology mapping and circuit clustering have a large impact on FPGA designs in terms of circuit performance, area, and power dissipation. Existing FPGA design flows carry o...
Joey Y. Lin, Deming Chen, Jason Cong