Sciweavers

1017 search results - page 165 / 204
» A routing algorithm for flip-chip design
Sort
View
VLSID
2005
IEEE
128views VLSI» more  VLSID 2005»
14 years 8 months ago
On-Line Synthesis for Partially Reconfigurable FPGAs
An important application of dynamically and partially reconfigurable computing platforms is in dynamic task allocation and execution. On-line synthesis, on-line placement and on-l...
Renqiu Huang, Ranga Vemuri
ICCAD
2006
IEEE
131views Hardware» more  ICCAD 2006»
14 years 4 months ago
Fast wire length estimation by net bundling for block placement
The wire length estimation is the bottleneck of packing based block placers. To cope with this problem, we present a fast wire length estimation method in this paper. The key idea...
Tan Yan, Hiroshi Murata
ISPD
2010
ACM
224views Hardware» more  ISPD 2010»
14 years 2 months ago
An analytical placer for mixed-size 3D placement
Existing 3D placement techniques are mainly used for standardcell circuits, while mixed-size placement is needed to support highlevel functional units and intellectual property (I...
Jason Cong, Guojie Luo
SIGCOMM
2009
ACM
14 years 2 months ago
A standalone content sharing application for spontaneous communities of mobile handhelds
This demo illustrates the benefits of BitHoc, a standalone protocol for content sharing among spontaneous communities of mobile handhelds using wireless multi-hop connections. Bi...
Amir Krifa, Mohamed Karim Sbai, Chadi Barakat, Thi...
IJCNN
2008
IEEE
14 years 2 months ago
Hybrid learning architecture for unobtrusive infrared tracking support
—The system architecture presented in this paper is designed for helping an aged person to live longer independently in their own home by detecting unusual and potentially hazard...
K. K. Kiran Bhagat, Stefan Wermter, Kevin Burn