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» A routing algorithm for flip-chip design
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SIGCOMM
2009
ACM
14 years 3 months ago
Optimizing the BSD routing system for parallel processing
The routing architecture of the original 4.4BSD [3] kernel has been deployed successfully without major design modification for over 15 years. In the unified routing architectur...
Qing Li, Kip Macy
IPSN
2004
Springer
14 years 2 months ago
Lattice sensor networks: capacity limits, optimal routing and robustness to failures
We study network capacity limits and optimal routing algorithms for regular sensor networks, namely, square and torus grid sensor networks, in both, the static case (no node failu...
Guillermo Barrenechea, Baltasar Beferull-Lozano, M...
MOBICOM
2005
ACM
14 years 2 months ago
MAP: medial axis based geometric routing in sensor networks
One of the challenging tasks in the deployment of dense wireless networks (like sensor networks) is in devising a routing scheme for node to node communication. Important consider...
Jehoshua Bruck, Jie Gao, Anxiao Jiang
IWCMC
2010
ACM
14 years 1 months ago
Only the short die old: route optimization in MANETs by dynamic subconnection shrinking
In reactive routing protocols, active routes for multihop connections retain their topological structure in spite of node movement over time. Unfortunately, node movements may mak...
Zeki Bilgin, Bilal Khan, Ala I. Al-Fuqaha
DATE
2005
IEEE
121views Hardware» more  DATE 2005»
14 years 2 months ago
Reduction of CMOS Power Consumption and Signal Integrity Issues by Routing Optimization
— This paper suggests a methodology to decrease the power of a static CMOS standard cell design at layout level by focusing on switched capacitance. The term switched is the key:...
Paul Zuber, Armin Windschiegl, Raúl Medina ...