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» A section cache system designed for VLIW architectures
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ICS
2009
Tsinghua U.
14 years 2 months ago
Dynamic cache clustering for chip multiprocessors
This paper proposes DCC (Dynamic Cache Clustering), a novel distributed cache management scheme for large-scale chip multiprocessors. Using DCC, a per-core cache cluster is compri...
Mohammad Hammoud, Sangyeun Cho, Rami G. Melhem
ISCA
1997
IEEE
135views Hardware» more  ISCA 1997»
13 years 11 months ago
The Design and Analysis of a Cache Architecture for Texture Mapping
The effectiveness of texture mapping in enhancing the realism of computer generated imagery has made support for real-time texture mapping a critical part of graphics pipelines. D...
Ziyad S. Hakura, Anoop Gupta
DATE
2008
IEEE
113views Hardware» more  DATE 2008»
14 years 2 months ago
Physical Architectures of Automotive Systems
This section will provide insight into new developments and advances in electronics automotive architectures. The design of innovative chip architectures, new upcoming standards f...
T. Forest, Alberto Ferrari, G. Audisio, M. Sabatin...
ISCA
2007
IEEE
130views Hardware» more  ISCA 2007»
13 years 7 months ago
Non-Inclusion Property in Multi-Level Caches Revisited
The center of gravity of computer architecture is moving toward memory systems. Barring breakthrough microarchitectural techniques to move processor performance to higher levels, ...
Mohamed M. Zahran, Kursad Albayraktaroglu, Manoj F...