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» A section cache system designed for VLIW architectures
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MSS
2005
IEEE
106views Hardware» more  MSS 2005»
14 years 1 months ago
An Architecture for Lifecycle Management in Very Large File Systems
We present a policy-based architecture STEPS for lifecycle management (LCM) in a mass scale distributed file system. The STEPS architecture is designed in the context of IBM’s ...
Akshat Verma, David Pease, Upendra Sharma, Marc Ka...
HICSS
2006
IEEE
131views Biometrics» more  HICSS 2006»
14 years 1 months ago
Design and Characterization of a Hardware Encryption Management Unit for Secure Computing Platforms
— Software protection is increasingly necessary for uses in commercial systems, digital content distributors, and military systems. The Secure Software (SecSoft) architecture is ...
Anthony J. Mahar, Peter M. Athanas, Stephen D. Cra...
HPCA
2007
IEEE
14 years 8 months ago
Extending Multicore Architectures to Exploit Hybrid Parallelism in Single-thread Applications
Chip multiprocessors with multiple simpler cores are gaining popularity because they have the potential to drive future performance gains without exacerbating the problems of powe...
Hongtao Zhong, Steven A. Lieberman, Scott A. Mahlk...
SAMOS
2007
Springer
14 years 1 months ago
Online Prediction of Applications Cache Utility
— General purpose architectures are designed to offer average high performance regardless of the particular application that is being run. Performance and power inefficiencies a...
Miquel Moretó, Francisco J. Cazorla, Alex R...
DAC
2004
ACM
14 years 8 months ago
High level cache simulation for heterogeneous multiprocessors
As multiprocessor systems-on-chip become a reality, performance modeling becomes a challenge. To quickly evaluate many architectures, some type of high-level simulation is require...
Joshua J. Pieper, Alain Mellan, JoAnn M. Paul, Don...