359 search results - page 41 / 72 » A section cache system designed for VLIW architectures |
ISCAS
2002
IEEE
14 years 19 days ago
2002
IEEE
Pre-designed configurable platforms, possessing microprocessors, memories, and numerous peripherals on a single chip, are increasing in popularity in embedded system design. Platf...
ICDCS
2008
IEEE
14 years 2 months ago
2008
IEEE
The multi-level storage architecture has been widely adopted in servers and data centers. However, while prefetching has been shown as a crucial technique to exploit the sequentia...
ASPLOS
2008
ACM
13 years 9 months ago
2008
ACM
Nested paging is a hardware solution for alleviating the software memory management overhead imposed by system virtualization. Nested paging complements existing page walk hardwar...
MICRO
2003
IEEE
14 years 29 days ago
2003
IEEE
Silicon technology will continue to provide an exponential increase in the availability of raw transistors. Effectively translating this resource into application performance, how...
DAC
2007
ACM
14 years 8 months ago
2007
ACM
Multicore has shown significant performance and power advantages over single cores in commercial systems with a 2-4 cores. Applying a corollary of Moore's Law for multicore, ...