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» A section cache system designed for VLIW architectures
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LCTRTS
2009
Springer
14 years 2 months ago
Guaranteeing instruction fetch behavior with a lookahead instruction fetch engine (LIFE)
Instruction fetch behavior has been shown to be very regular and predictable, even for diverse application areas. In this work, we propose the Lookahead Instruction Fetch Engine (...
Stephen Roderick Hines, Yuval Peress, Peter Gavin,...
DAC
2001
ACM
14 years 8 months ago
Using Texture Mapping with Mipmapping to Render a VLSI Layout
This paper presents a method of using texture mapping with mipmapping to render a VLSI layout. Texture mapping is used to save already rasterized areas of the layout from frame to...
Jeff Solomon, Mark Horowitz
OTM
2007
Springer
14 years 1 months ago
Invasive Patterns for Distributed Programs
Software patterns have evolved into a commonly used means to design and implement software systems. Programming patterns, architecture and design patterns have been quite successfu...
Luis Daniel Benavides Navarro, Mario Südholt,...
ICCS
2005
Springer
14 years 1 months ago
The Dynamics of Computing Agent Systems
The paper presents the Multi Agent System (MAS) designed for the large scale parallel computations. The special kind of diffusionbased scheduling enables to decompose and allocate...
Maciej Smolka, Piotr Uhruski, Robert Schaefer, Mar...
ISCA
2002
IEEE
82views Hardware» more  ISCA 2002»
14 years 19 days ago
Increasing Processor Performance by Implementing Deeper Pipelines
One architectural method for increasing processor performance involves increasing the frequency by implementing deeper pipelines. This paper will explore the relationship between ...
Eric Sprangle, Doug Carmean