359 search results - page 58 / 72 » A section cache system designed for VLIW architectures |
GECCO
2009
Springer
14 years 3 months ago
2009
Springer
We describe a methodology for evolving Java bytecode, enabling the evolution of extant, unrestricted Java programs, or programs in other languages that compile to Java bytecode. B...
ACSC
2005
IEEE
14 years 2 months ago
2005
IEEE
The Address Recalculation Pipeline is a hardware architecture designed to reduce the end-to-end latency suffered by immersive Head Mounted Display virtual reality systems. A deman...
CAV
2006
Springer
14 years 21 days ago
2006
Springer
Fast is a tool designed for the analysis of counter systems, i.e. automata extended with unbounded integer variables. Despite the reachability set is not recursive in general, Fast...
CODES
1998
IEEE
14 years 1 months ago
1998
IEEE
Timing analysis for checking satisfaction of constraints is a crucial problem in real-time system design. In some current approaches, the delay of software modules is precalculate...
ICDE
2006
IEEE
14 years 3 months ago
2006
IEEE
We consider the problem of wide-area large-scale text search over a peer-to-peer infrastructure. A wide-area search infrastructure with billions of documents and millions of searc...