1529 search results - page 218 / 306 » A slant removal algorithm |
VLSID
2002
IEEE
14 years 9 months ago
2002
IEEE
One of the major roadblocks in reduction of library generation cycle time is the layout generation phase. The two methods of doing automatic layout generation are synthesis and mig...
HPCA
2002
IEEE
14 years 9 months ago
2002
IEEE
The increasing performance gap between processors and memory will force future architectures to devote significant resources towards removing and hiding memory latency. The two ma...
SIGMOD
2008
ACM
14 years 9 months ago
2008
ACM
In wireless sensor networks (WSNs), energy consumption and data quality are two important issues due to limited energy resources and the need for accurate data. In this scenario, i...
ICSE
2003
IEEE-ACM
14 years 9 months ago
2003
IEEE-ACM
Editing graphic models always entails layout problems. Inserting and deleting items requires tedious manual work for shifting existing items and rearranging the diagram layout. He...
ICCD
2004
IEEE
14 years 5 months ago
2004
IEEE
This paper proposes a power-aware cache block allocation algorithm for the way-selective setassociative cache on embedded systems to reduce energy consumption without additional d...