We study a type of linear placement problem arising in detailed placement optimization of a given cell row in the presence of white-space (extra sites). In this single-row placeme...
Andrew B. Kahng, Paul Tucker, Alexander Zelikovsky
We present BonnPlace, a new VLSI placement algorithm that combines the advantages of analytical and partitioning-based placers. Based on (non-disjoint) placements minimizing the t...
The placement of passive components significantly influences the EMI behavior of power electronic systems. Particularly filter components are affected by magnetic field coupling r...
In this invited note we describe Capo, an open-source software tool for cell placement, mixed-size placement and floorplanning with emphasis on routability. Capo is among the fas...
Jarrod A. Roy, David A. Papa, Saurabh N. Adya, Hay...
Physical synthesis tools are responsible for achieving timing closure. Starting with 130nm designs, multiple cycles are required to cross the chip, making latch placement critical...
David A. Papa, Tao Luo, Michael D. Moffitt, Chin-N...