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» A study of slipstream processors
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HPCA
2000
IEEE
14 years 2 months ago
Impact of Chip-Level Integration on Performance of OLTP Workloads
With increasing chip densities, future microprocessor designs have the opportunity to integrate many of the traditional systemlevel modules onto the same chip as the processor. So...
Luiz André Barroso, Kourosh Gharachorloo, A...
ICSE
2007
IEEE-ACM
14 years 10 months ago
Parallel Randomized State-Space Search
Model checkers search the space of possible program behaviors to detect errors and to demonstrate their absence. Despite major advances in reduction and optimization techniques, s...
Matthew B. Dwyer, Sebastian G. Elbaum, Suzette Per...
ISCA
2002
IEEE
128views Hardware» more  ISCA 2002»
14 years 3 months ago
Detailed Design and Evaluation of Redundant Multithreading Alternatives
Exponential growth in the number of on-chip transistors, coupled with reductions in voltage levels, makes each generation of microprocessors increasingly vulnerable to transient f...
Shubhendu S. Mukherjee, Michael Kontz, Steven K. R...
CANPC
1999
Springer
14 years 2 months ago
Implementing Application-Specific Cache-Coherence Protocols in Configurable Hardware
Streamlining communication is key to achieving good performance in shared-memory parallel programs. While full hardware support for cache coherence generally offers the best perfo...
David Brooks, Margaret Martonosi
HPCA
2003
IEEE
14 years 10 months ago
Caches and Hash Trees for Efficient Memory Integrity
We study the hardware cost of implementing hash-tree based verification of untrusted external memory by a high performance processor. This verification could enable applications s...
Blaise Gassend, G. Edward Suh, Dwaine E. Clarke, M...