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» A study of slipstream processors
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IPPS
2010
IEEE
13 years 5 months ago
Processor affinity and MPI performance on SMP-CMP clusters
Clusters of Symmetric MultiProcessing (SMP) nodes with multi-core Chip-Multiprocessors (CMP), also known as SMP-CMP clusters, are becoming ubiquitous today. For Message Passing int...
Chi Zhang, Xin Yuan, Ashok Srinivasan
ASAP
2006
IEEE
168views Hardware» more  ASAP 2006»
13 years 11 months ago
Dual-Processor Design of Energy Efficient Fault-Tolerant System
A popular approach to guarantee fault tolerance in safety-critical applications is to run the application on two processors. A checkpoint is inserted at the completion of the prim...
Shaoxiong Hua, Pushkin R. Pari, Gang Qu
CASES
2008
ACM
13 years 9 months ago
Multiple sleep mode leakage control for cache peripheral circuits in embedded processors
This paper proposes a combination of circuit and architectural techniques to maximize leakage power reduction in embedded processor on-chip caches. It targets cache peripheral cir...
Houman Homayoun, Mohammad A. Makhzan, Alexander V....
CF
2005
ACM
13 years 9 months ago
Marching-pixels: a new organic computing paradigm for smart sensor processor arrays
In this paper we present a new organic computing principle denoted as marching pixels for the architectures of future smart CMOS camera chips. The idea of marching pixels is based...
Dietmar Fey, Daniel Schmidt 0003
DSD
2008
IEEE
139views Hardware» more  DSD 2008»
13 years 9 months ago
Revisiting the Cache Effect on Multicore Multithreaded Network Processors
Caching mechanism has achieved great success in general purpose processor; however, its deployment in Network Processor (NP) raises questions over its effectiveness under the new ...
Zhen Liu, Jia Yu, Xiaojun Wang, Bin Liu, Laxmi N. ...