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» A study of slipstream processors
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MASCOTS
2008
13 years 9 months ago
Optimizing Galois Field Arithmetic for Diverse Processor Architectures and Applications
Galois field implementations are central to the design of many reliable and secure systems, with many systems implementing them in software. The two most common Galois field opera...
Kevin M. Greenan, Ethan L. Miller, Thomas J. E. Sc...
SSR
2001
73views more  SSR 2001»
13 years 9 months ago
XML implementation of frame processor
A quantitative study has shown that frame technology [1] supported by Fusion toolset can lead to reduction in time-tomarket (70%) and project costs (84%). Frame technology has bee...
Tak Wong, Stan Jarzabek, Soe Myat Swe, Ru Shen, Ho...
ICDCS
1996
IEEE
13 years 11 months ago
The Performance Value of Shared Network Caches in Clustered Multiprocessor Workstations
This paper evaluates the bene t of adding a shared cache to the network interface as a means of improving the performance of networked workstations con gured as a distributed shar...
John K. Bennett, Katherine E. Fletcher, William Ev...
ISSS
1995
IEEE
100views Hardware» more  ISSS 1995»
13 years 11 months ago
Power analysis and low-power scheduling techniques for embedded DSP software
This paper describes the application of a measurement based power analysis technique for an embedded DSP processor. An instruction-level power model for the processor has been dev...
Mike Tien-Chien Lee, Vivek Tiwari, Sharad Malik, M...
ERSA
2006
147views Hardware» more  ERSA 2006»
13 years 9 months ago
Code Partitioning for Reconfigurable High-Performance Computing: A Case Study
In this case study, various ways to partition a code between the microprocessor and FPGA are examined. Discrete image convolution operation with separable kernel is used as the ca...
Volodymyr V. Kindratenko