Sciweavers

1137 search results - page 84 / 228
» A study of slipstream processors
Sort
View
119
Voted
COMCOM
2004
95views more  COMCOM 2004»
15 years 3 months ago
A distributed middleware infrastructure for personalized services
In this paper, we present an overview of extensible Retrieval, Annotation and Caching Engine (eRACE), a modular and distributed intermediary infrastructure that collects informati...
Marios D. Dikaiakos, Demetrios Zeinalipour-Yazti
146
Voted
TCAD
2008
110views more  TCAD 2008»
15 years 2 months ago
A Reactive and Cycle-True IP Emulator for MPSoC Exploration
The design of MultiProcessor Systems-on-Chip (MPSoC) emphasizes intellectual-property (IP)-based communication-centric approaches. Therefore, for the optimization of the MPSoC inte...
Shankar Mahadevan, Federico Angiolini, Jens Spars&...
149
Voted
TPDS
2010
260views more  TPDS 2010»
15 years 2 months ago
Real-Time Modeling of Wheel-Rail Contact Laws with System-On-Chip
—This paper presents the development and implementation of a multiprocessor system-on-chip solution for fast and real time simulations of complex and nonlinear wheel-rail contact...
Yongji Zhou, T. X. Mei, Steven Freear
280
Voted
PE
2011
Springer
365views Optimization» more  PE 2011»
14 years 10 months ago
Optimal resource allocation for time-reservation systems
This paper studies the optimal resource allocation in time-reservation systems. Customers arrive at a service facility and receive service in two steps; in the first step informa...
Ran Yang, Sandjai Bhulai, Rob van der Mei, Frank J...
152
Voted
SIGMETRICS
2011
ACM
178views Hardware» more  SIGMETRICS 2011»
14 years 10 months ago
Should we worry about memory loss?
In recent years the High Performance Computing (HPC) industry has benefited from the development of higher density multi-core processors. With recent chips capable of executing u...
O. Perks, Simon D. Hammond, S. J. Pennycook, Steph...