This paper presents a quantification of the timing effects that advanced processor features like data and instruction cache, pipelines, branch prediction units and out-oforder ex...
Efficient scheduling of jobs on parallel processors is essential for good performance. However, design of such schedulers is challenging because of the complex interaction between...
In a 64-bit processor, many of the data values actually used in computations require much narrower data-widths. In this study, we demonstrate that instruction data-widths exhibit ...
We describe the Slice Processor micro-architecture that implements a generalized operation-based prefetching mechanism. Operation-based prefetchers predict the series of operation...
Andreas Moshovos, Dionisios N. Pnevmatikatos, Amir...
Abstract— In this paper, we study parallelization of multiobjective optimization algorithms on a set of hetergeneous resources based on the Master-Slave model. Master-Slave model...