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» A study of slipstream processors
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PARLE
1994
15 years 7 months ago
Using Reference Counters in Update-Based Coherent Memory
Abstract. As the disparity between processor and memory speed continues to widen, the exploitation of locality of reference in shared-memory multiprocessors becomes an increasingly...
Evangelos P. Markatos, Catherine E. Chronaki
121
Voted
HIPEAC
2009
Springer
15 years 7 months ago
MPSoC Design Using Application-Specific Architecturally Visible Communication
Abstract. This paper advocates the placement of Architecturally Visible Communication (AVC) buffers between adjacent cores in MPSoCs to provide highthroughput communication for str...
Theo Kluter, Philip Brisk, Edoardo Charbon, Paolo ...
126
Voted
DATE
2004
IEEE
130views Hardware» more  DATE 2004»
15 years 7 months ago
Modeling and Simulating Memory Hierarchies in a Platform-Based Design Methodology
This paper presents an environment based on SystemC for architecture specification of programmable systems. Making use of the new architecture description language ArchC, able to ...
Pablo Viana, Edna Barros, Sandro Rigo, Rodolfo Aze...
147
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FCCM
2006
IEEE
201views VLSI» more  FCCM 2006»
15 years 7 months ago
Hardware/Software Approach to Molecular Dynamics on Reconfigurable Computers
With advances in reconfigurable hardware, especially field-programmable gate arrays (FPGAs), it has become possible to use reconfigurable hardware to accelerate complex applicatio...
Ronald Scrofano, Maya Gokhale, Frans Trouw, Viktor...
183
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VLDB
1995
ACM
214views Database» more  VLDB 1995»
15 years 7 months ago
Dynamic Multi-Resource Load Balancing in Parallel Database Systems
Parallel database systems have to support the effective parallelization of complex queries in multi-user mode, i.e. in combination with inter-query/inter-transaction parallelism. ...
Erhard Rahm, Robert Marek