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IESS
2007
Springer
92views Hardware» more  IESS 2007»
14 years 3 months ago
An Interactive Model Re-Coder for Efficient SoC Specification
To overcome the complexity in System-on-Chip (SoC) design, researchers have developed sophisticated design flows that significantly reduce the development time through automation...
Pramod Chandraiah, Rainer Dömer
CASCON
1996
111views Education» more  CASCON 1996»
13 years 10 months ago
A hybrid process for recovering software architecture
A large portion of the software used in industry today is legacy software. Legacy systems often evolve into dicult to maintain systems whose original design has been lost or else ...
Vassilios Tzerpos, Richard C. Holt
CGO
2009
IEEE
14 years 4 months ago
OptiScope: Performance Accountability for Optimizing Compilers
Compilers employ many aggressive code transformations to achieve highly optimized code. However, because of complex target architectures and unpredictable optimization interaction...
Tipp Moseley, Dirk Grunwald, Ramesh Peri
FPL
2008
Springer
207views Hardware» more  FPL 2008»
13 years 10 months ago
Bitstream compression techniques for Virtex 4 FPGAs
This paper examines the opportunity of using compression for accelerating the (re)configuration of FPGA devices, focusing on the choice of compression algorithms, and their hardwa...
Radu Stefan, Sorin Dan Cotofana
ANSOFT
2002
171views more  ANSOFT 2002»
13 years 9 months ago
OPM/Web - Object-Process Methodology for Developing Web Applications
Web applications can be classified as hybrids between hypermedia and information systems. They have a relatively simple distributed architecture from the user viewpoint, but a comp...
Iris Reinhartz-Berger, Dov Dori, Shmuel Katz